I'm currently working on a Rogue-like action game for the GBA. With roughly 10 minute runs it fits perfectly for a portable console. The first test version will be available soon. Once that is out, I really hope for your feedback and suggestions to make it a great game.
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I worked the last days on fixing some edge case FPU bug in the #MiSTerFPGA N64 core.
There is an article on my patreon if you are interested in more technical details about the core development and researching such details.
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I'm currently reducing the logic size of the #MiSTerFPGA N64 core by redesigning some parts, but keep the same functionality.
After TLB was added, the core was at 87% logic utilization, now we already won 4% back.
Final Core with all features should stay below 90% to fit well.
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A bugfix of the interrupt handling in the #MiSTerFPGA N64 core fixes a bug that made nearly all Libdragon based games and homebrew crash randomly.
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Basic texturing is now working in the N64 core.
To even get this simple demo to show properly, several other components also had to be added to the RDP.
For example: alpha combining, color blending and framebuffer readback.
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Implemented the first part of the RDP rendering pipeline for the #MiSTerFPGA N64 core. Gouraud shading is starting to work but still has some edge cases to be fixed. Once that works correct, I can start with texturing.
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Working on the RSP doesn't give me any fancy things to present, but at least I can show you that the RSP now fulfills 64% of the tests.
I started with the RSP only 10 days ago, so I'm very happy with the progress and that everything went smooth so far.
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Implemented the non-vector part of the RSP for the #MiSTerFPGA N64 core. It does fulfill the first set of RSP tests.
The vector instruction part of the RSP is still missing and I will work on that next.
More details on the status can be found in a Patreon post.
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The #MiSTerFPGA N64 core does now fulfill existing RSP DMA tests plus my own new ones.
What does that mean?
Code and Data for the RSP coprocessor can now be loaded from RDRAM and RSP results can be written back.
Implementation of the RSP internal processing can start soon.
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The first game is working on the #MiSTerFPGA N64 core, much faster than I expected.
I also added audio functionality to the core.
Have fun!
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Implemented the SI DMA and PIF handling in the N64 #MiSTerFPGA core. What does that mean?
Controllers are working now!
I tested with a Switch N64 controller(NSO) via blueooth.
Even without any adjustments the results are already very close to a new N64 pad.
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The FPU for the #MiSTerFPGA N64 core is done and passes all tests.
If you still don't know what floating point is or how it works and want to learn about it: I wrote an article on Patreon about this topic, where I try to explain the concept behind with simple math.
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The #MiSTerFPGA N64 core FPU is nearly complete, some floating point demos are working now.
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I spend just too much time today on the N64 FPU, but I'm happy everything looks so good already.
83% of the 2418 FPU tests are now pass, only 3 instructions still left to be implemented.
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The n64 systemtest can be used very well to watch the progress of the FPU in the FPGA core.
With the new instructions added, the score increases from 5% to 10%.
If I can keep that pace I would be super happy, but that is probably too optimistic for such a complex submodule.
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3 very simple Floating Point operations pass the tests in the #MiSTerFPGA N64 core. All transfer operations between CPU and FPU are also implemented now so the groundwork is finished to work on the more difficult things without running in troubles or getting distracted.
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Completed my own soft floating point implementation in the software emulator. It's passing all tests and seems fine in games, so the FPGA FPU implementation can start.
Implemented the FPU registers today and first read/write operations for the FPU. Now the real "fun" begins.
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First part of the rendering is now implemented in the #MiSTerFPGA N64 core. Some stray pixels remain, but it's great to see the N64NICCC demo running.
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The n64-systemtest from Lemmy does now start on the #MiSTerFPGA core and we can judge the state of the cores CPU. There are still issues to be solved, but I'm very happy that the ALU tests fully pass, so all kind of 32bit and 64bit calculations are working correct.
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