Semiconductor packaging used to be unsexy, not to mentioned dumb, but now it’s as innovative as the chips they house.
Today’s scarcity in chips and memory will be addressed by tomorrow’s advancecd packaging techniques.
I had the privilege of meeting with leaders in packaging from large and small companies across the semi landscape at the 2025 International Microelectronics Assembly and Packaging Society (
@IMAPSorg ) conference.
We discussed co-packaged optics to to low-k dielectrics to hybrid bonding to through-silicon vias to heterogeneous integration of silicon and 3-5s.
As transistors shrink to a few atoms, its packaging and interconnect that’s going to keep us marching forward on Moore’s law: